Ccd Focal Plane Array Analog Image Processor

نویسنده

  • S. Eid
چکیده

A focal plane array designed for real-time, general-purpose, image preprocessing is described. The analog charge-coupled device-based array operates in the charge domain and has sensing, storing, and computing capabilities. It captures the image data and performs local neighborhood operations. The array is digitally programmable and various image preprocessing tasks can be implemented. It uses a single instruction, multiple data parallel architecture with one processing element serving four pixels. It can be programmed to perform AID conversion prior to output. The ultra-compact image processor is currently being fabricated with a 3-um, double-poly, double-metal process. The 48 X 48 pixel array is projected to achieve an internal throughput as high as 576 Mops with a 54 dB dynamic range (9-bit equivalent accuracy) and 180 um detector pitch. The total power aissipation is estimated to be 12 mW or less. The total size of 2 the 59-pad chip is 9.4 X 9.4 mm .

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Architectures for focal plane image processing

Architectures for focal plane image processing are discussed. On-chip image preprocessing for solid-state imagers using analog CCD circuits is described for low, medium, and high density detector arrays. A spatially parallel architecture for low density, high throughput applica­ tions is described. For sparse illumination or event detection, a content· addressable architecture is proposed. A ne...

متن کامل

New Charge-coupled Devices and Circuits for Analog Vlsi Focal-plane Image Processing

It has been remarked that CCD circuits, unlike transistor circuits, must A new approach to designing low-power, be monolithically integrated to function. compact, charge-coupled device (CCD), Unfortunately, confinement of the signal analog, VLSI circuits for signal charge to the semiconductor inhibits the processing is described. A charge domain implementation of circuit topologies in wire tran...

متن کامل

Focal Plane Image Processor Chip

A focal-plane-array chip designed for real-time, general-purpose, image preprocessing is reported. A 48 X 48 pixel detector array and a 24 X 24 processing element processor array are monolithically integrated on the chip. The analog, charge-coupled device-based VLSI chip operates in the charge domain and has sensing, storing, and computing capabilities. It captures the image data and performs l...

متن کامل

ACE16k: A Programmable Focal Plane Vision Processor with 128 x 128 Resolution

* --This paper presents a new generation 128x128 Focal Plane Analog Programmable Array Processor (FPAPAP), from a system level perspective. The design has recently sent to fabrication in a 0.35μm standard digital 1P-5M CMOS Technology. The chip has been designed to achieve the high-speed and moderate-accuracy constraints of most real time image processing applications. It has been designed to b...

متن کامل

from Automated Inspection and High . . Speed Vision Architectures III

A focal-plane-array chip designed for real-time, general-purpose, image preprocessing is reported. A 48 X 48 pixel detector array and a 24 X 24 processing element processor array are monolithically integrated on the chip. The analog, charge-coupled device-based VLSI chip operates in the charge domain and has sensing, storing, and computing capabilities. It captures the image data and performs l...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1988